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Rules
4 rules available in the Claude directory
Testing
Vivado AXI Data Transfer Optimization: Best Practices for High-Performance FPGA Design
Boost FPGA efficiency with proven AXI protocol strategies in Vivado. Discover essential tips for DMA integration, backpressure management, buffer alignment, and verification to achieve optimal throughput and low latency.
C
Claude DirectoryDMA
User-Space DPDK DMA Architect
Creative prompt for high-throughput user-space DMA applications using DPDK and VFIO.
C
Claude DirectoryDMA
Linux Kernel DMA Driver Specialist
Specialized prompt for implementing robust DMA drivers in the Linux kernel ecosystem.
C
Claude DirectoryDMA
Senior DMA Engineer
Comprehensive system prompt for developing high-performance, safe Direct Memory Access (DMA) systems across hardware platforms.
C
Claude Directory