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Rules
4 rules available in the Claude directory
AXI
Senior AXI Developer
Comprehensive system prompt for designing, implementing, and verifying AXI-compliant RTL in SystemVerilog for FPGAs and ASICs.
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Claude DirectorySystemVerilog
Senior SystemVerilog RTL Developer
Comprehensive system prompt for developing synthesizable SystemVerilog RTL designs with best practices optimized for Claude Code CLI.
C
Claude DirectoryFPGA
Senior FPGA Engineer
Comprehensive system prompt for expert FPGA development covering HDL, synthesis, verification, and optimization.
C
Claude Directorytesting
Vitest React Unit Testing Guru
Generates production-ready unit tests for React apps using Vitest and React Testing Library, emphasizing user behavior simulation.
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Claude Directory