Differentiable Logic Gate Networks for Low-Latency EEG Classification on Edge Devices

Analysis

Why This Paper Matters

Real-time EEG classification on edge devices is critical for portable brain-computer interfaces (BCIs) but is severely bottlenecked by the floating-point arithmetic of conventional neural networks. This paper introduces Differentiable Logic Gate Networks (Diff-Logic) as a hardware-native alternative that compiles models into pure Boolean circuits executable via bitwise CPU operations. The significance lies in addressing the fundamental mismatch between traditional neural network compute patterns and the constraints of low-power edge hardware, offering a path to deploy sophisticated models on devices with limited memory and energy budgets.

The work is particularly timely as the field moves toward wearable BCIs for medical diagnostics (e.g., dementia screening) and affective computing (emotion recognition). By demonstrating that logic-based networks can match or exceed the accuracy of conventional MLPs while drastically reducing latency and model size, the authors provide a compelling case for rethinking neural architecture design for edge deployment.

Technical Contributions

• Diff-Logic Architecture: Replaces floating-point operations with differentiable logic gates that can be trained end-to-end and then compiled into Boolean circuits.
• Hardware-Native Execution: Models execute via bitwise CPU operations, eliminating the need for floating-point units and enabling constant inference time across model scales.
• Iso-Parameter Comparison: Rigorous controlled experiments at four complexity tiers (50k–500k parameters) against MLP and BNN baselines on four EEG datasets.
• Two Diverse Tasks: Binary dementia detection and 3-class emotion recognition, demonstrating generalizability across clinical and affective domains.
• Edge Deployment Validation: Measured on a power-constrained (7W) Nvidia Jetson Orin Nano CPU (single-core), providing realistic latency and model size metrics.

Results

On dementia screening, Diff-Logic achieves 80.2% Macro F1, outperforming the MLP baseline by 6.8%. For emotion recognition, the MLP retains a moderate accuracy advantage but incurs 2.3x higher latency and 14x larger model size. Critically, Diff-Logic inference time remains nearly constant across a 10x increase in model scale, achieving a peak speedup of 2.9x over MLPs at the largest complexity tier (500k parameters). These results demonstrate that logic-based networks can provide competitive or superior accuracy while natively satisfying the latency and memory constraints of portable edge deployment.

Significance

This work establishes logic-based neural architectures as a practical paradigm for resource-constrained BCIs, challenging the assumption that floating-point neural networks are necessary for high-accuracy EEG classification. The constant inference time across model scales is particularly impactful for adaptive systems that may need to dynamically adjust model complexity. The open-source code release further enables reproducibility and community adoption. Future work could extend Diff-Logic to other physiological signals (e.g., ECG, EMG) and explore integration with specialized hardware like FPGAs for even greater efficiency.