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SlugLab/CXLMemSim

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CXLMemSim: Practical Performance Simulation and Characterization of CXL 3.0 Memory Systems

FreeFree tier
Type
Open Source
Company
SlugLab
Visit Website GitHub (38 stars)

About SlugLab/CXLMemSim

CXLMemSim is an open-source software framework for studying CXL (Compute Express Link) memory systems without requiring complete CXL hardware. It provides a CXL memory latency, bandwidth, topology, and coherency simulator, as well as a QEMU-integrated CXL emulation stack for Type 3 memory devices, distributed memory pooling, and experimental Type 2 accelerator/GPU support. The framework enables full-system experiments where guest software interacts with a realistic CXL device interface while the host side records and controls protocol-level behavior such as latency, routing, coherency state, directory pressure, and memory placement. It includes integration with QEMU, gem5, and a CUDA shim library for Type 2 GPU experiments.

Key Features

CXL memory latency, bandwidth, topology, and coherency simulator
QEMU-integrated CXL emulation stack for Type 3 memory devices and distributed memory pooling
Experimental Type 2 accelerator/GPU support via CUDA Driver API shim
Full-system experiments with realistic CXL device interface
Newick-style topology representation
Integration with gem5 for O3CPU trace setup
Supports allocation, migration, paging, and caching policies
C++20 codebase with public headers and server/client architecture

Pros & Cons

Pros
  • Open source and free to use
  • Enables research and development without costly CXL hardware
  • Supports both Type 3 (memory) and Type 2 (accelerator) CXL device models
  • Full-system simulation with realistic device interface and protocol behavior
  • Integrates with widely used tools like QEMU and gem5
  • Active development with community contributions (231 commits, 58 forks, 1.1k stars)
Cons
  • Simulation accuracy is limited compared to real hardware measurements
  • Requires setting up QEMU and potentially gem5, which can be complex
  • Type 2 GPU support is experimental and may require additional configuration
  • Documentation may be sparse for advanced use cases

Best For

Performance simulation and characterization of CXL 3.0 memory systemsHardware-software co-design for CXL-based architecturesCloud memory pooling and disaggregated memory researchDevelopment and testing of CXL device drivers and guest softwareAccelerator memory coherence studies (Type 2 devices)

FAQ

What is CXLMemSim?
CXLMemSim is an open-source software framework for simulating and characterizing CXL 3.0 memory systems. It provides a simulator for CXL memory latency, bandwidth, topology, and coherency, as well as a QEMU-integrated stack for emulating Type 3 memory devices and experimental Type 2 accelerators/GPUs.
Does CXLMemSim require real CXL hardware?
No, CXLMemSim is designed to study CXL memory systems without requiring complete CXL hardware. It uses simulation and emulation to mimic CXL behavior.
What types of CXL devices does CXLMemSim support?
It supports Type 3 memory devices (including distributed memory pooling) and experimental Type 2 accelerator/GPU support via a CUDA-compatible shim library.
Can I use CXLMemSim with QEMU?
Yes, CXLMemSim includes a QEMU integration with launch scripts and guest-side support. It modifies QEMU's device model to forward memory operations to the CXLMemSim server.
Is CXLMemSim free?
Yes, it is open-source and free to use. The source code is available on GitHub under a license (LICENSE file is included in the repository).